1/4 rev. a structure silicon monolithic integrated circuits product series bipolar stepping motor driver type BD6423EFV function ? pwm constant current controllable two h bridge driver ? built-in translator circuit for clk-in control ? full, half, and quarter step modes ? mix decay control absolute maximu m ratings(ta=25 ) item symbol limit unit supply voltage v cc1,2 -0.2 +45.0 v power dissipation pd 1.1 1 w 4.0 2 w input voltage for control pin v in -0.2 +5.5 v rnf maximum voltage v rnf 0.7 v maximum output current i out 1.0 3 a/phase operating temperature range t opr -25 +85 storage temperature range t stg -55 +150 junction temperature t jmax 150 1 70mm 70mm 1.6mm glass epoxy board. derating in done at 8.8mw/ for operating above ta=25 . 2 4-layer recommended board. derating in done at 32.0mw/ for operating above ta=25 . 3 do not, however exceed pd, aso and tjmax=150 . operating conditions (ta=-25 +85 ) item symbol min typ max unit supply voltage v cc1,2 19 37 42 v output current i out - 0.5 0.7 4 a/phase 4 do not, however exceed pd, aso. this product isn?t designed for protection against radioactive rays.
2/4 rev. a electrical characteristics (unless otherwise specified ta=25 , v cc1,2 =37v) item symbol limit unit conditions min. typ. max. whole circuit current at standby i ccst - 1.0 2.5 ma ps=l circuit current i cc - 2.0 5.0 ma ps=h, vref=3v control input (clk, cw_ccw, mode0, mode1, enable, dec1, dec2, ps) h level input voltage v inh 2.0 - - v l level input voltage v inl - - 0.8 v h level input current i inh 35 50 100 a v in =5v l level input current i inl -10 0 - a v in =0v output (out1a, out1b, out2a, out2b) output on resistance r on - 2.0 2.6 i out =0.5a, sum of upper and lower output leak current i leak - - 10 a current control rnfx input current i rnf -40 -20 - a rnfx=0v vref input current i vref -2.0 -0.1 - a vref=0v vref input voltage range v ref 0 - 3.0 v comparator threshold v cth 0.57 0.60 0.63 v vref=3v minimum on time (blank time) t onmin 0.5 1.5 3.0 s c=470pf, r=82k
3/4 rev. a package outline block diagram pin no. / pin name pin no. pin name pin no. pin name 1 gnd 13 clk 2 out1b 14 cw_ccw 3 rnf1 15 test 4 out1a 16 mode0 5 vcc1 17 mode1 6 nc 18 enable 7 gnd 19 nc 8 cr 20 vcc2 9 dec1 21 out2a 10 dec2 22 rnf2 11 vref 23 out2b 12 ps 24 nc nc : non connection bd6423 lot no. product no. htssop-b24 (unit:mm) predriver 5 vcc1 blank time pwm control translator 2bit dac tsd uvlo regulator reset 7 gnd 8 cr 10 dec2 12 ps 13 clk 16 mode0 17 mode1 9 dec1 14 cw_ccw 18 enable vref 11 2 out1b 4 out1a 3 rnf1 20 vcc2 21 out2a 1 gnd 23 out2b 22 rnf2 15 test control logic mix decay control rnf1 rnf2 ocp osc
4/4 rev. a operation notes (1) absolute maximum ratings an excess in the absolute maximum ratings, such as supply voltage, temper ature range of operating conditions, etc., can break down the devices, thus ma king impossible to identify breaking mode, such as a short circuit or an open circuit. if any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. (2) power supply lines as return of current regenerated by back emf of mo tor happens, take steps such as putting capacitor between power supply and gnd as an electric pathway for the regenerated current. be sure that there is no problem with each property such as emptied capacity at lower temperature regarding electrolytic capacitor to decide capacity value. if the connected power supply does not have sufficient current absorption capacity, regenerative current will cause the voltage on the power supply line to rise, which combined with the product and its peripheral circuitry may exceed the absolute maximum ratings. it is recommended to implement a physical safety measure such as the in sertion of a voltage clamp diode between the power supply and gnd pins. (3) gnd potential the potential of gnd pin must be minimu m potential in all operating conditions. (4) metal on the backside (define the side wher e product markings are printed as front) the metal on the backside is shorted wi th the backside of ic chip therefor e it should be c onnected to gnd. be aware that there is a possibility of malfunction or destruction if it is shorted with any potential other than gnd. (5) thermal design use a thermal design that allows for a sufficient marg in in light of the power dissipation (pd) in actual operating conditions. this ic exposes its frame of the backside of package. note that this part is assumed to use after providing heat dissipation treatment to improve heat dissipation efficiency. try to occupy as wide as possible with heat dissipation pattern not only on the board surface but also the backside. (6) actions in strong electromagnetic field use caution when using the ic in t he presence of a strong electromagnet ic field as doing so may cause the ic to malfunction. (7) aso when using the ic, set the output transistor so that it does not exceed absolute maximum ratings or aso. (8) thermal shutdown circuit the ic has a built-in thermal shutdown circuit (tsd circuit). if the chip temperature becomes tjmax=150 , and higher, coil output to the motor will be open. the tsd circuit is designed only to shut the ic off to prevent runaway thermal operation. it is not designed to protect or indemnify peripheral equipment. do not use the tsd function to protect peripheral equipment. (9) ground wiring pattern when using both large current and small signal gnd pa tterns, it is recommended to isolate the two ground patterns, placing a single ground poi nt at the ground potent ial of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. be careful not to change the gnd wiring pattern of any external components, either. (10) mounting errors when attaching to a printed circuit board, pay att ention to the direction of the ic and displacement. improper attachment may lead to destruction of the ic. (11) test pin be sure to connect test pin to gnd.
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